1. Field
This disclosure relates generally to synchronization, and more specifically, to a synchronous multiple port memory with asynchronous ports.
2. Related Art
Along with recent advancements of semiconductor technologies, smaller-size and larger-capacity memories that allow high-speed reading/writing operations have been developed. Further, a so-called multiport memory including plural input ports and output ports has been used for reading/writing data of different addresses.
Multi-port memories, by providing access to the storage element of memory cells to more than one resource, such as in the case of multi-core processor or an interface between a processor and a bus, have become more commonly used. One of the issues with multi-port memories is how to coordinate this aspect of providing access to more than one resource. Often this ability is achieved using wait states and/or arbitration. This can result in unpredictable access times which is undesirable.
Accordingly there is a need for a multi-port memory that improves upon one or more of the issues discussed above. Furthermore, in some scenarios, it is necessary for a synchronous memory to interface to other logic units having different operating frequencies.